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Connect Pro Management Consultants · posted 15 days ago
Location- Bengaluru
I would rather prefer 5+ years of candidate who is exposed to full design cycle .
We look for the qualities such as
floorplanning skills.
Block & fullchip knowledge, expert in SoC integration.
Handled multiple tape outs as a Lead lead person.
Good ESD knowledge & PAD ring completion with ESD & IO placements
Good EM /IR knowledge + expert in Volus-Fi / Totem flow.
Good process knowledge & Packaging knowledge.
Good at automation.
Who is familiar in reviewing the post-PG activities such as mask data review/
FA for failed devices etc
We are NOT looking for candidates (1) who has majority of experience in
Finfets or such lower node technologies (2) who has majority of experience in
memory layouts.