Microchip-Chennai_Physical Design_7 to 15+yrs

Microchip-Chennai

Senior Engineer II - Physical Design

Work Experience: 7 to 15+years

Job Description:

Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

Microchip AES Design team in Bangalore is looking for an experienced and motivated Physical Design Engineer to implement RTL2GDSII for larger SOCs. As a member of Physical Design team, you will be responsible for place and route, timing closure and physical verification checks for multiple blocks and top level. The candidate should have experience with Physical Design tools. The candidate should have in depth knowledge of Innovus/ICC2 tool execution.

Location: Chennai, India

Requirements/Qualifications:

Job Responsibilities:

The employee is responsible for complete physical design of multiple large & complex blocks & sub-system implementation from 40nm to 3nm and below technology nodes. The employee is expected to take ownership of Full Chip/Subsystem complex design & flow challenges, which would include:

·         Floor-planning, Place & Route and CTS using physical design tools like Innovus and ICC2.

·         Physical verification and IP Integration

·         Physical Design Flow and Methodology.

·         IR and EM checks.

·         Ability to lead Junior team members along with the project execution.

·         Use metric-driven techniques to help ensure first-pass working silicon.

·         Communicate regularly with the implementation and project team to resolve issues, and communicate status to leads

·         Occasional travel needed.

Job Qualifications:

This position requires at least B.E/B.Tech/M.Tech in Electronics with 7+ years of Physical Design experience in a fast-paced environment with following experience.

·         Expertise in Physical Design activities: Floor-planning, CTS, P&R, Extraction, Power IR/EM, Physical Verification (DRC/LVS) and Signal Integrity

·         Advanced knowledge of place and route methodologies and low power methodologies.

·         Static Timing/Crosstalk Analysis and timing closure

·         Must have an understanding of Synthesis/DFT concepts and flow

·         Experience in working with analog IP, hard and soft macros and delivering hierarchical design projects

·         Expertise with Backend Tools (Innovus or ICC2, Calibre or PVS, PrimeTime or Tempus, Redhawk or Voltus, Starrcxt or QRC)

·         Strong programming knowledge in Perl, TCL, and/or Shell and Python Scripting

·         Excellent oral and written communications skills in order to work with teams across the globe

Travel Time: 0% - 25%

Required details

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2. Variable Pay/Annual Bonus-

3. Unvested RSU & vesting period-

4. Expected Base/Fixed pay-

5. Notice Period (if serving-LWD)-

6. Any offer in hand and offered Base/Fixed pay-

7. Current location-

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