Texas Instruments-Bangalore_DMS Verification_4 to 7years

Texas Instruments-Bangalore

Digital Mixed Signal DV Engineer

Experience : 4 to 7years
About the job  
If you are looking to join an ingenious, vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world, here is an opportunity for you!   
Digital Design Verification (DV) Engineer
Location:  Bangalore, India
Experience:  4–7 Years
What will you be doing in this role?

• Verification Strategy:  Drive the verification strategy, create detailed Test Plans, and develop comprehensive Test Benches for Chip Top levels.
• UVM Architecture:  Responsible for grounds-up development of the DV environment, including coding UVM components like agents, drivers, monitors, and scoreboards.
• Full-Cycle Execution:  Execute RTL and Gate Level Simulations (GLS), running regressions and tracking functional and code coverage (Block, Expression, Toggle, FSM) to achieve 100% closure. Worked on standard communication protocols like I2C, ASI, SPI, UART etc.
• Technical Debugging:  Utilize excellent debugging and problem-solving skills to resolve complex design and testbench issues.
• Post-Silicon Support:  Interact with Product and Application Engineering teams to support ATE functional pattern generation and silicon characterization.
• Cross-Functional Collaboration:  Work closely with Architecture, Design, and Firmware teams to ensure successful product execution.