Director, Design verification engineering

Director, Design verification engineering

Location- Bengaluru

Key Responsibilities

• Strategic Technical Leadership : Define verification strategy and architecture for complex Edge AI based digital designs, providing expert consultation across multiple projects and teams
• Execution excellence & Innovation : Pioneer advanced verification methodologies and frameworks that drive organization-wide improvement in verification effectiveness and efficiency. Promote continuous improvement to verification techniques to ensure ‘Zero Defect’ chips
• Team management : Lead a verification team and deliver to multiple parallel projects. Plan and scale the verification domain with efficient resource management.
• Cross-Organizational Influence : Drive verification decisions across organizational lines, collaborating with design teams, product managers, and executives on verification requirements and sign-off criteria. Work with Product test engineering, Silicon validation, and SW team for first-pass Si success and high-volume production.
• Complex Problem Resolution : Lead resolution of the most challenging verification issues requiring specialized knowledge and creative solutions
• Technical Mentorship : Develop talent across the organization by mentoring verification engineers at all levels and establishing verification methodologies and best practices
• Industry Leadership : Represent ADI at industry forums, contribute to standards development, and collaborate with EDA tool vendors to influence future verification technologies
• Strategic Quality Assurance : Establish verification metrics and quality standards across product lines that ensure design accuracy and reliability

 

 

Must Have Skills

• SystemVerilog and UVM Mastery : Recognized expert-level knowledge of SystemVerilog and Universal Verification Methodology for architecting sophisticated verification environments for Edge AI class of designs
• Verification Strategy and Architecture : Exceptional ability to develop comprehensive verification strategies that drive coverage-driven methodologies and verification closure across multiple product lines
• Digital Verification Expertise : Deep understanding of digital SOC design principles (Processor, Interconnect/Fabric, AHB/AXI protocols, Memory, Security, Boot, High and Low speed peripherals understanding) and verification methodologies, with proven ability to implement innovative verification approaches for complex designs
• Advanced Debugging Mastery : Superior RTL/System level and GLS debugging skills across multiple design abstractions, with demonstrated ability to solve the most complex verification challenges
• Verification Methodology Innovation : Proven track record of developing and implementing new verification methodologies that advance the state of the art
• Technical Leadership and Influence : Demonstrated ability to influence verification direction across the organization, mentor engineering teams, and drive methodology adoption through technical expertise
• Strategic Problem Solving : Advanced analytical capabilities to identify and solve unusually significant verification challenges with high impact across product lines

 

Preferred Education and Experience

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or related field
• 15+ years of relevant verification experience with complex digital SOC designs
• Experience leading verification teams and/or major verification initiatives