Principal Engineer, Project Design Verification Lead

Location:- Hyderabad

Experience:- 10+Years

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

 

Responsibilities and Duties include, but not limited to:

 

• Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits

• Supervising and own the full chip verification activities including planning, tracking, and criteria setting

• Drive multi-functional team in key features evaluation and recommend decision on architecture

• Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product

• Proactively solicit guidance from Standards, CAD, modeling, and verification groups to ensure the design quality

• Driving innovation into the future Memory generation with dynamic work environment

• Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies

• Leverage AI tools to automate the tools and workflow

  Applying Artificial Intelligence in workflows to improve build efficiency

Successful candidates for this position will have:

 

• Broad knowledge and experience in NAND Flash memory design is preferred

• Ability to lead multi-functional team in a project environment

• Good interpersonal skills with the ability to convey complex technical concepts in verbal and written form

• Proven knowledge of various logic, analog, and mixed signal circuit’s functionality on full chip level

• Proven expertise and background in Test Bench development in System Verilog

• Knowledge in verification methodologies such as UVM

• Knowledge of circuit simulators such as XA, hspice and/or hsim/Finesim, etc.

• Knowledge of semiconductor reliability issues including CHC, NBTI, stress and snapback, as well as Electro migration (EM) and IR analysis

• An understanding of StarRC/Calibre parasitic extraction flow and capability to debug extraction issues

• 10+ years of proven experience in non-volatile memory design

• Degree or equivalent experience/Major: BS, MS or Ph.D in Electrical Engineering (or related fields)