STA, Full Chip Expert

STA position

Location- Hyderabad

Responsibilities will include, but are not limited to:

• Minimum of 7+ yrs of experience required.
• Static timing Analysis of DRAM block wise , top level analysis , cell level analysis
• Writing constraints , analyzing the STA reports
• Circuit understanding block wise , Full chip level
• Reporting violations to Design team , ownership for closure
• Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions
• Performing verification processes with modeling and simulation using industry standard simulators
• Contributing to cross group communication to work towards standardization and group success
• Driving innovation into the future Memory generations within a dynamic work environment
• Doing STD cells characterization work
• Able to characterize basic STD Cells
• Writing ARC for STD cell char (using primeLib , Silicon smart)
• Understanding & usage of AI Skills is must.