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Connect Pro Management Consultants
Infineon_Physical Design_Ahmedabad
Connect Pro Management Consultants · posted 7 months ago
Ahmedabad, Gujaratdesign and development
About the role
Job Description In your new role you will:
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Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification , and taking blocks to the closure.
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Design Application Engineering (DAE ) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance).
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You will be the first point of contact for project teams in case of issues and will work to achieve the highest customer interaction.
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Responsible for automation of manual processes (including design flow/design package qualification mechanisms, generation of test reports/dashboards etc.) and providing automation requirements for reducing manual steps in qualification.
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The candidate will have an internal drive to work with design and EDA vendors to solve issues and adopt new flows.
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The candidate should have reasonable ability to automate design work by means of script programming, e.g. Tcl/tk, Perl or Python.
Your Profile You are best equipped for this task if you have:
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The candidate should have a minimum of 2 years of relevant working experience in Physical Design implementation areas including Synthesis, LEC, and PnR as well as good exposure to signoff areas, particularly power, timing, and IR signoff.
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One should have a deep understanding of and be able to be cater to design concerns across semi-custom design flows, including RTL analysis, synthesis, LEC, Place and Route, STA, EM/IR, and physical verification.
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One should be able to identify flow gaps and provide automation on need base to perform all design activities in the most efficient and correct-by-construction way.
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One should be able to evaluate solutions from multiple available options and be able to perform trade-offs between technical features.
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Analyse the results and any inconsistency issues to be reports via bug tracking system.
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One will work with R&D in Infineon globally and EDA tool vendors to resolve issues across semi-custom design flows.
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One will coordinate with IT and EDA tool license teams to provide an infrastructure aligned with project needs.
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One should have exposure to basic version management using any of Clearcase/Perforce/Cliosoft/Git.
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You should possess excellent communication skills to interact effectively with peers and customers in a clear and honest manner with consistent and open to learning new technical areas if the need arises.
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You should define and monitor key test metrics, build regression status reporting dashboard, Develop and execute QA test plans, verification methodology & test strategies for digital block/chip level to maximize the coverage of features/methodology supported in the technologies/Design Flows.