Principal Engineer- Chiplet Architect

Principal Engineer - Chiplet Architect 

Job Description

Define and drive Architecture of the chiplets optimized for MCU constraints
Define and drive Architecture of the D2D interface IPs targeted for MCU chiplets
Collaborate closely with product and software architects to define and refine the architecture
Play a key role in shaping the microarchitecture of the IP blocks and the subsystems
Work closely with functional verification teams on test-plan development and reviews
Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets
Provide support to functional validation teams in post silicon debug
IP selection and make/buy decisions are a key factor for this role

Qualifications

Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus
BTech/MTech in Electrical/Electronic Engineering, Computer Engineering or Computer Science with hardware engineering experience of 15+ years
Can – do attitude, openness to new environment, people and culture
Experience in D2D protocols like UCIe or Bunch-of-wire
Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency
Experience with benchmarking IP/SoC performance and tuning IP/SoC architecture
Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers.
Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must
Any of following experience would be a plus: NIC/FlexNOC interconnect; Flash memory subsystems, Power management
Experience in using Virtual Prototype tools (ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS etc..) is a plus