Sr Technical Staff Engineer - SOC Verification / Formal Verification

Required Qualifications

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
• 12+ years of experience in digital design verification with a proven track record of successful SoC or MCU product tape-outs.
• Strong expertise in SystemVerilog, UVM , and coverage-driven verification methodologies.
• Hands-on experience verifying complex SoCs containing ARM or comparable embedded processor architectures.
• Deep understanding of AMBA protocols including AXI, AHB, and APB.
• Experience developing verification plans, testbenches, checkers, assertions, and coverage models.
• Strong debugging skills across RTL, simulations, regressions, and full-chip integration environments.
• Ability to influence technical decisions and collaborate effectively across geographically distributed engineering teams.
• Excellent communication and technical leadership skills.

 

Preferred Qualifications

• Experience with Formal Verification methodologies and tools such as JasperGold or VC Formal.
• Expertise in gate-level simulations, low-power, and power-aware verification methodologies.
• Familiarity with functional safety standards and safety verification approaches, including ISO 26262.
• Experience with fault-injection simulations and functional safety coverage analysis.
• Strong expertise in verification automation, scripting, and productivity tools (Python, Perl, or similar), with experience leveraging AI-assisted technologies to improve verification quality, accelerate debug, optimize regression efficiency, and drive faster coverage closure.
• Knowledge of post-silicon validation and alignment between pre-silicon verification and silicon bring-up activities.
• Exposure to mixed-signal or AMS verification environments.
• Prior experience providing technical leadership, mentoring engineers, or leading methodology and automation initiatives within a verification organization.