Sr Digital IP Design Manager - Design - 15+ yrs

Exp- 14+yrs 

Senior Digital IP Design Manager 

Job Description Job Summary: Sr/ Digital IP Design Manager 

Location - Bangalore  

Responsibilities Key Responsibilities Technical Leadership 

Lead the design of digital data path IP and modules for CMOS image sensors, including high ‑ performance, low ‑ power pipelines. 

Drive development of core platform digital-on-top and subsystem IP for the onsemi Treo platform. 

Ensure IP meets automotive quality, safety, and reliability requirements (e.g., robustness, configurability, reuse). 

Partner closely with architecture, DV, PD, analog, mixed-signal, system, full-chip integration, firmware, and software teams to deliver end-to-end solutions.  

Provide technical guidance on RTL quality, low-power design, clocking/reset strategies, and design-for-test to design engineers. 

Participate in technical reviews, risk assessment, and post-silicon learning. 

Team & People Management 

Lead and mentor talented digital IP designers. 

Bring quality, flow and schedule focus to the team. 

Foster collaboration, accountability, innovation and continuous improvement. 

Innovation & Productivity 

Stay curious and engaged with emerging trends, especially AI/ML-driven approaches to: 

RTL generation and review 

Integration and Si debug productivity 

Design-space exploration 

Champion adoption of tools and processes that reduce cycle time and improve first-time-right outcomes 

Responsibilities for Internal Candidates  

Preferred / Nice-to-Have Qualifications 

Experience with CMOS image sensor digital pipelines or imaging-related IP. 

Familiarity with platform or subsystem-level IP development. 

Exposure to functional safety concepts relevant to automotive products. 

Experience driving or adopting EDA automation, scripting, or AI-assisted workflows. 

Prior experience scaling or building a new team. 

Qualifications for Internal Candidates     

Qualifications Required Qualifications 

15+ years of overall experience in digital IC design. 

5+ years of proven people management or technical leadership experience. 

Strong background in digital IP or SoC development. 

Experience working on Automotive IP or automotive semiconductor products. 

Hands-on experience with: 

RTL design (SystemVerilog / Verilog) 

Low-power design techniques 

IP reuse and configurability 

Demonstrated ability to lead cross-functional technical efforts. 

Strong communication skills and the ability to influence across teams and geographies.