Principal AMS Verification (7+yrs)

Job Role: AMS Verification

Title : Principal AMS Verification

Experience : 7+ to 15 yrs

  BE in Electrical Engineering or related 8+years of experience, or MS + 7 years of experience in AMS verification 

• Expert-level knowledge in Analog Mixed-Signal simulations
• Expert-level modeling of Analog blocks using SV Real Modeling / Verilog-AMS /Verilog-A 
• Proficient  on  using design and verification languages: Verilog, System Verilog, and System Verilog Assertions (SVA).
•  Proficient on Design Verification development process, from specification to test plan, to configurable test bench, drivers and checkers setup, to test suite building to meet functional and code coverage goals 
• Experience in verifying Power Management Blocks 
• Proficiency in scripting languages such as PERL, TCL, Python
• Excellent communication skills with a collaborative and team-oriented mindset
• Ability to quickly ramp on new systems and processes